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专利名称：Digital filter and method for performing a
multiplication based on a look-up table
发明人：Thorsten Schier,Jonas Askeroth,Greger
Sjoberg
申请号：US09970757申请日：20011003
公开号：US20020118739A1公开日：20020829
专利附图：
摘要：A digital and a multiplication method are described, which lead to an efficientarchitecture for hardware implementation of digital FIR and IIR filters into FPGAs. The
multiplications of input sample data and delayed sample data with filter coefficients areperformed by addressing look-up tables in which corresponding multiplication resultsare prestored. The size of the look-up tables is reduced by storing only those
multiplication results which cannot be obtained by a shifting operation performed on theother pre-stored multiplication results, the input sample data, or the delayed sampledata. Thereby, the size of the look-up tables can be compressed significantly such that animplementation of large digital filters into FPGAs is possible.
申请人：SCHIER THORSTEN,ASKEROTH JONAS,SJOBERG GREGER
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