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专利名称：ADAPTING NUMBER OF DATA POINTS
PROCESSED IN PARALLEL TO MATCH SIZEOF DECOMPOSED FFTS
发明人：Jacob, Naveen申请号：EP17159166.2申请日：20170303公开号：EP3370161A1公开日：20180905
专利附图：
摘要：An embedded system (400) is described. The embedded system (400) includesa processing circuit (402) comprising at least one processor configured to support an
implementation of a non-power-of-2 fast Fourier transform (FFT) of length N using amultiplication of at least two smaller FFTs of a respective first length N1 and secondlength N2, where N1 and N2 are whole numbers; and a memory (404), operably coupledto the processing circuit (404) and comprising at least input data. The processing circuit(402) is configured to: receive an input data complex number sequence; adapt the inputdata complex number sequence by inserting at least one zero into every X data pointthat results in an excess number (M) of data points above N, where X=N1, such that theinserted zeroes enables a use of a multiple-of-Q FFT; perform a first decomposed FFT ofa respective first length N1 on the adapted input data complex number sequence andproduce a first output complex number sequence; restore a number of data points of thefirst output complex number sequence to N after performing the first decomposed FFT;and perform a second decomposed FFT of a respective second length N2 on the firstoutput complex number sequence that produces a second output complex numbersequence.
申请人：NXP B.V.
地址：High Tech Campus Building 60 5656 AG Eindhoven NL
国籍：NL
代理机构：Terblanche, Candice Jane
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