MM54C373资料

MM54C373󰁋MM74C373TRI-STATEOctalD-TypeLatchMM54C374󰁋MM74C374TRI-STATEOctalD-TypeFlip-FlopMarch1988

MM54C373󰁋MM74C373TRI-STATE󰀄OctalD-TypeLatchMM54C374󰁋MM74C374TRI-STATEOctalD-TypeFlip-Flop

GeneralDescription

TheMM54C373󰁋MM74C373󰀷MM54C374󰁋MM74C374areintegrated󰀷complementaryMOS(CMOS)󰀷8-bitstorageele-mentswithTRI-STATEoutputs󰀟Theseoutputshavebeenspeciallydesignedtodrivehighcapacitiveloads󰀷suchasonemightfindwhendrivingabus󰀷andtohaveafanoutof1whendrivingstandardTTL󰀟Whenahighlogiclevelisap-pliedtotheOUTPUTDISABLEinput󰀷alloutputsgotoahighimpedancestate󰀷regardlessofwhatsignalsarepresentattheotherinputsandthestateofthestorageelements󰀟TheMM54C373󰁋MM74C373isan8-bitlatch󰀟WhenLATCHENABLEishigh󰀷theQoutputswillfollowtheDinputs󰀟WhenLATCHENABLEgoeslow󰀷dataattheDinputs󰀷whichmeetstheset-upandholdtimerequirements󰀷willberetainedattheoutputsuntilLATCHENABLEreturnshighagain󰀟

TheMM54C374󰁋MM74C374isan8-bit󰀷D-type󰀷positive-edgetriggeredflip-flop󰀟DataattheDinputs󰀷meetingtheset-upandholdtimerequirements󰀷istransferredtotheQoutputsonpositive-goingtransitionsoftheCLOCKinput󰀟

BoththeMM54C373󰁋MM74C373andtheMM54C374󰁋MM74C374arebeingassembledin20-pindual-in-linepack-ageswith0󰀟300󰀃pincenters󰀟

Features

YYYY

WidesupplyvoltagerangeHighnoiseimmunityLowpowerconsumptionTTLcompatibility

3Vto15V0󰀟45VCC(typ󰀟)Fanoutof1

drivingstandardTTL

YYYY

Y

BusdrivingcapabilityTRI-STATEoutputs

Eightstorageelementsinonepackage

SingleCLOCK󰁋LATCHENABLEandOUTPUTDISABLEcontrolinputs

20-pindual-in-linepackagewith0󰀟300󰀃centerstakeshalftheboardspaceofa24-pinpackage

ConnectionDiagrams

MM54C373󰁋MM74C373Dual-In-LinePackage

MM54C374󰁋MM74C374Dual-In-LinePackage

TL󰁋F󰁋5906–1TL󰁋F󰁋5906–2

TopView

OrderNumberMM54C373orMM74C373

TopView

OrderNumberMM54C374orMM74C374

TRI-STATE󰀄isaregisteredtrademarkofNationalSemiconductorCorporation󰀟C1995NationalSemiconductorCorporation

TL󰁋F󰁋5906

RRD-B30M105󰁋PrintedinU󰀟S󰀟A󰀟

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AbsoluteMaximumRatings(Note1)

IfMilitary󰁋Aerospacespecifieddevicesarerequired󰀷pleasecontacttheNationalSemiconductorSalesOffice󰁋Distributorsforavailabilityandspecifications󰀟VoltageatAnyPin

OperatingTemperatureRange(TA)MM54C373MM74C373

StorageTemperatureRange(TS)

b0󰀟3VtoVCCa0󰀟3V

b55󰀅Ctoa125󰀅Cb40󰀅Ctoa85󰀅Cb65󰀅Ctoa150󰀅C

PowerDissipationDual-In-LineSmallOutline

OperatingVCCRangeAbsoluteMaximumVCCLeadTemperature(TL)(Soldering󰀷10seconds)

700mW500mW3Vto15V

18V260󰀅C

DCElectricalCharacteristicsMin󰁋Maxlimitsapplyacrosstemperaturerangeunlessotherwisenoted

SymbolCMOSTOCMOSVIN(1)VIN(0)VOUT(1)VOUT(0)IIN(1)IIN(0)IOZICCVIN(1)VIN(0)VOUT(1)

Logical‘‘1’’InputVoltageLogical‘‘0’’InputVoltageLogical‘‘1’’OutputVoltageLogical‘‘0’’OutputVoltageLogical‘‘1’’InputCurrentLogical‘‘0’’InputCurrentTRI-STATELeakageCurrentSupplyCurrent

VCCe5VVCCe10VVCCe5VVCCe10V

VCCe5V󰀷IOeb10mAVCCe10V󰀷IOeb10mAVCCe5V󰀷IOe10mAVCCe10V󰀷IOe10mAVCCe15V󰀷VINe15VVCCe15V󰀷VINe0VVCCe15V󰀷VOe15VVCCe15V󰀷VOe0VVCCe15V54C74C54C54C54C74C54C74C

VOUT(0)

Logical‘‘0’’OutputVoltage

54C74C

VCCe4󰀟5VVCCe4󰀟75VVCCe4󰀟5VVCCe4󰀟75V

VCCe4󰀟5V󰀷IOeb360mAVCCe4󰀟75V󰀷IOeb360mAVCCe4󰀟5V󰀷IOeb1󰀟6mAVCCe4󰀟75V󰀷IOeb1󰀟6mAVCCe4󰀟5V󰀷IOe1󰀟6mAVCCe4󰀟75V󰀷IOe1󰀟6mA

VCCb0󰀟4VCCb0󰀟4

2󰀟42󰀟4

0󰀟40󰀟4

VCCb1󰀟5VCCb1󰀟5

0󰀟80󰀟8

b1󰀟0b1󰀟0

ParameterConditionsMinTypMaxUnits

3󰀟58󰀟0

1󰀟52󰀟0

4󰀟59󰀟0

0󰀟51󰀟0

0󰀟005

b0󰀟005

VVVVVVVVmAmA

1󰀟0300

mAmAmA

1󰀟0

0󰀟005

b0󰀟005

0󰀟05

CMOS󰁋LPTTLINTERFACE

Logical‘‘1’’InputVoltageLogical‘‘0’’InputVoltageLogical‘‘1’’OutputVoltage

VVVVVVVVVV

OUTPUTDRIVE(ShortCircuitCurrent)ISOURCEISOURCEISINKISINK

OutputSourceCurrentOutputSourceCurrentOutputSinkCurrent(N-Channel)OutputSinkCurrent(N-Channel)

VCCe5V󰀷VOUTe0VTAe25󰀅C(Note4)VCCe10V󰀷VOUTe0VTAe25󰀅C(Note4)VCCe5V󰀷VOUTeVCCTAe25󰀅C(Note4)VCCe10V󰀷VOUTeVCCTAe25󰀅C(Note4)

b12b24

b24b48

mAmAmAmA

624

1248

Note1󰀌‘‘AbsoluteMaximumRatings’’arethosevaluesbeyondwhichthesafetyofthedevicecannotbeguaranteed󰀟Exceptfor‘‘OperatingTemperatureRange’’theyarenotmeanttoimplythatthedevicesshouldbeoperatedattheselimits󰀟Thetableof‘‘ElectricalCharacteristics’’providesconditionsforactualdeviceoperation󰀟

2

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ACElectricalCharacteristics󰀂

Symboltpd0󰀷tpd1

Parameter

PropagationDelay󰀷

LATCHENABLEtoOutput

MM54C373󰁋MM74C373󰀷TAe25󰀅C󰀷CLe50pF󰀷tretfe20ns󰀷unlessotherwisenoted

Conditions

VCCVCCVCCVCC

eeee

MinTyp165701958515570185857035

Max33014039017031014037017014070

UnitsnsnsnsnsnsnsnsnsnsnsMHzMHz

5V󰀷CLe50pF10V󰀷CLe50pF5V󰀷CLe150pF10V󰀷CLe150pF

tpd0󰀷tpd1

PropagationDelayDataIntoOutput

LATCHENABLEeVCCVCCe5V󰀷CLe50pFVCCe10V󰀷CLe50pFVCCe5V󰀷CLe150pFVCCe10V󰀷CLe150pFtHOLDe0nsVCCe5VVCCe10VVCCe5VVCCe10VVCC5VVCCe10VVCCe5VVCCe10V

RLe10k󰀷CLe5pFVCCe5VVCCe10V

RLe10k󰀷CLe50pFVCCe5VVCCe10VVCCVCCVCCVCC

eeee

tSET-UP

MinimumSet-UpTimeDataIntoCLOCK󰁋LATCHENABLEMaximumLATCHENABLEFrequency

MinimumLATCHENABLEPulseWidth

MaximumLATCHENABLERiseandFallTime

PropagationDelayOUTPUTDISABLEtoHighImpedanceState(fromaLogicLevel)PropagationDelayOUTPUTDISABLEtoLogicLevel

(fromHighImpedanceState)TransitionTime

fMAX

3󰀟54󰀟56󰀟79󰀟07555NANA10560105456535110707󰀟57󰀟5510200

210120210901307022014010107󰀟515150110

tPWHtr󰀷tft1H󰀷t0H

nsnsmsmsnsnsnsnsnsnsnsnspFpFpFpFpF

tH1󰀷tH0

tTHL󰀷tTLH

5V󰀷CLe50pF10V󰀷CLe50pF5V󰀷CLe150pF10V󰀷CLe150pF

CLECODCINCOUTCPD

InputCapacitanceInputCapacitanceInputCapacitanceOutputCapacitance

PowerDissipationCapacitance

LEInput(Note2)OUTPUTDISABLEInput(Note2)

AnyOtherInput(Note2)HighImpedanceState(Note2)PerPackage(Note3)

󰀂ACParametersareguaranteedbyDCcorrelatedtesting󰀟

3

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ACElectricalCharacteristics󰀂(Continued)

MM54C374󰁋MM74C374󰀷TAe25󰀅C󰀷CLe50pF󰀷tretfe20ns󰀷unlessotherwisenoted

Symboltpd0󰀷tpd1

Parameter

PropagationDelay󰀷CLOCKtoOutput

VCCVCCVCCVCC

eeee

Conditions5V󰀷CLe50pF10V󰀷CLe50pF5V󰀷CLe150pF10V󰀷CLe150pF

MinTyp150651808070357050

Max30013036016014070140100

UnitsnsnsnsnsnsnsnsnsMHzMHz

tSET-UP

MinimumSet-UpTimeDataIntoCLOCK󰁋LATCHENABLEMinimumCLOCKPulseWidthMaximumCLOCKFrequencyPropagationDelayOUTPUTDISABLEtoHighImpedanceState(fromaLogicLevel)PropagationDelayOUTPUTDISABLEtoLogicLevel

(fromHighImpedanceState)TransitionTime

tHOLDe0nsVCCe5VVCCe10VVCCe5VVCCe10VVCCe5VVCCe10V

RLe10k󰀷CLe50pFVCCe5VVCCe10V

RLe10k󰀷CLe50pFVCCe5VVCCe10VVCCVCCVCCVCC

eeee

tPWH󰀷tPWLfMAXt1H󰀷t0H

3󰀟557󰀟0101056010545653511070

2101202109013070220140

nsnsnsnsnsnsnsnsmsms

tH1󰀷tH0

tTHL󰀷tTLH

5V󰀷CLe50pF10V󰀷CLe50pF5V󰀷CLe150pF10V󰀷CLe150pF

155

tr󰀷tfCCLKCODCINCOUTCPD

MaximumCLOCKRiseandFallTimeInputCapacitanceInputCapacitanceInputCapacitanceOutputCapacitance

PowerDissipationCapacitance

VCCe5VVCCe10V

CLOCKInput(Note2)OUTPUTDISABLEInput(Note2)

AnyOtherInput(Note2)HighImpedanceState(Note2)PerPackage(Note3)

l2000l2000

7󰀟57󰀟5510250

10107󰀟515

pFpFpFpFpF

󰀂ACParametersareguaranteedbyDCcorrelatedtesting󰀟Note2󰀌Capacitanceisguaranteedbyperiodictesting󰀟

Note3󰀌CPDdeterminesthenoloadACpowerconsumptionofanyCMOSdevice󰀟Forcompleteexplanationsee54C󰁋74CFamilyCharacteristicsApplicationNoteAN-90󰀟

Note4󰀌Thesearepeakoutputcurrentcapabilities󰀟Continuousoutputcurrentisratedat12mAmax󰀟

4

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TypicalPerformanceCharacteristicsTAe25󰀅C

MM54C373󰁋MM74C373PropagationDelay󰀷LATCHENABLEtoOutputvsLoadCapacitance

MM54C373󰁋MM74C373PropagationDelay󰀷DataIntoOutputvsLoadCapacitance

MM54C374󰁋MM74C374PropagationDelay󰀷CLOCKtoOutputvsLoadCapacitance

TL󰁋F󰁋5906–3

MM54C373󰁋MM74C373󰀷MM54C374󰁋MM74C374

ChangeinPropagationDelayperpFofLoadCapacitance(DtPD󰁋pF)vsPowerSupplyVoltage

MM54C373󰁋MM74C373󰀷MM54C374󰁋MM74C374

OutputSinkCurrentvsVOUTMM54C373󰁋MM74C373󰀷

MM54C374󰁋MM74C374OutputSourceCurrentvsVCCbVOUT

TL󰁋F󰁋5906–4

TruthTable

MM54C373󰁋MM74C373OutputDisableLLLH

LATCHENABLEHHLX

DHLXX

QHLQHi-Z

MM54C374󰁋MM74C374OutputDisableLLLLH

ClockLLLHX

DHLXXX

QHLQQHi-Z

LeLowlogiclevelHeHighlogiclevelXeIrrelevant

LeLowtohighlogicleveltransitionQePreexistingoutputlevelHi-ZeHighimpedanceoutputstate

5

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TypicalApplications

DataBusInterfacingElement

Simple󰀷Latching󰀷Octal󰀷LEDIndicatorDriverwithBlankingforUseasDataDisplay󰀷BusMonitor󰀷mPFrontPanelDisplay󰀷Etc󰀟

TL󰁋F󰁋5906–5

TL󰁋F󰁋5906–6

LogicDiagrams

MM54C373󰁋MM74C373(1of8Latches)

TL󰁋F󰁋5906–7

MM54C374󰁋MM74C374(1of8Flip-Flops)

TL󰁋F󰁋5906–8

6

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TRI-STATETestCircuitsandSwitchingTimeWaveforms

t1H󰀷tH1

t1H󰀷CLe5pF

tH1󰀷CLe50pF

TL󰁋F󰁋5906–9

TL󰁋F󰁋5906–10

t0H󰀷tH0t0H󰀷CLe5pFtH0󰀷CLe50pF

TL󰁋F󰁋5906–12

TL󰁋F󰁋5906–11

SwitchingTimeWaveforms

MM54C373󰁋MM74C373

OutputDisableeGND

TL󰁋F󰁋5906–13

MM54C374󰁋MM74C374

OutputDisableeGND

TL󰁋F󰁋5906–14

7

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MM54C373󰁋MM74C373TRI-STATEOctalD-TypeLatchMM54C374󰁋MM74C374TRI-STATEOctalD-TypeFlip-FlopPhysicalDimensionsinches(millimeters)

CeramicDual-In-LinePackage(J)

OrderNumberMM54C373J󰀷MM54C374J󰀷MM74C373JorMM74C374J

NSPackageNumberJ20A

MoldedDual-In-LinePackage(N)

OrderNumberMM54C373N󰀷MM54C374N󰀷MM74C373NorMM74C374N

NSPackageNumberN20A

LIFESUPPORTPOLICY

NATIONAL’SPRODUCTSARENOTAUTHORIZEDFORUSEASCRITICALCOMPONENTSINLIFESUPPORTDEVICESORSYSTEMSWITHOUTTHEEXPRESSWRITTENAPPROVALOFTHEPRESIDENTOFNATIONALSEMICONDUCTORCORPORATION󰀟Asusedherein󰀌1󰀟Lifesupportdevicesorsystemsaredevicesorsystemswhich󰀷(a)areintendedforsurgicalimplantintothebody󰀷or(b)supportorsustainlife󰀷andwhosefailuretoperform󰀷whenproperlyusedinaccordancewithinstructionsforuseprovidedinthelabeling󰀷canbereasonablyexpectedtoresultinasignificantinjurytotheuser󰀟

NationalSemiconductorCorporation1111WestBardinRoad2󰀟Acriticalcomponentisanycomponentofalifesupportdeviceorsystemwhosefailuretoperformcanbereasonablyexpectedtocausethefailureofthelifesupportdeviceorsystem󰀷ortoaffectitssafetyoreffectiveness󰀟

NationalSemiconductorEuropeFax󰀌(a49)0-180-5308586NationalSemiconductorHongKongLtd󰀟13thFloor󰀷StraightBlock󰀷NationalSemiconductorJapanLtd󰀟Tel󰀌81-043-299-2309