专利内容由知识产权出版社提供
专利名称：Method of manufacturing semiconductor
device for dual damascene wiring
发明人：Yuusuke Oda申请号：US12216610申请日：20080708
公开号：US20090017620A1公开日：20090115
专利附图：
摘要：A method of manufacturing a semiconductor device includes forming a via holein an interlayer dielectric film, forming a wiring trench in said interlayer dielectric film forconnecting to the via hole, and forming a dual damascene wiring trench in the interlayerdielectric film for forming a dual damascene wiring which is connected to a conductivefilm. In forming the via hole, the via hole is formed in a bow shape and, in forming thewiring trench, the wiring trench is formed by etching to a position where a diameter ofthe via hole becomes substantially a maximum to provide a via having a forward taper
shape under the wiring trench.
申请人：Yuusuke Oda
地址：Kanagawa JP
国籍：JP
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