专利内容由知识产权出版社提供
专利名称：DIGITALLY ASSISTED REGULATION FOR AN
INTEGRATED CAPLESS LOW-DROPOUT(LDO) VOLTAGE REGULATOR
发明人：Yuhe Wang,Marzio Pedrali-Noy,Xuhao
Huang,Martin Saint-Laurent,Xufeng Chen
申请号：US13843121申请日：20130315
公开号：US20140266103A1公开日：20140918
专利附图：
摘要：Techniques are described that embed a digital assisted regulator with an LDO
regulator on a chip without requiring a capacitor external to the chip and to regulate avoltage without undershoot. The digital assisted regulator responds to informationregarding operation of the LDO regulator and to a signal that provides advance
notification of a load change. When the advance notification signal is received, the digitalassisted regulator pulls a circuit's supply voltage up to a chip's incoming supply voltage.When the correct operating voltage has been reached and any undershoot problemremoved, the digital assisted regulator balances the current it provides with the currentprovided by the LDO regulator, to allow a quick response time for other load changes.Also, bandwidth of an LDO regulator may be expanded by use of an advance notice signalto increase bias current of an LDO output device to meet an upcoming load change.
申请人：QUALCOMM INCORPORATED
地址：San Diego CA US
国籍：US
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