详解Flyback的RCD吸收电路

Application Note AN-4147

Design Guidelines for RCD Snubber of Flyback Converters

Abstract

This article presents some design guidelines for the RCDsnubber of flyback converters. When the MOSFET turns off,a high-voltage spike occurs on the drain pin because of a res-onance between the leakage inductor (Llk) of the main trans-former and the output capacitor (COSS) of the MOSFET. Theexcessive voltage on the drain pin may lead to an avalanchebreakdown and eventually damage the MOSFET. Therefore,it is necessary to add an additional circuit to clamp the volt-age.

is derived from a buck-boost converter by replacing filterinductors with coupled inductors, such as gapped core trans-formers. When the main switch turns on, the energy is storedin the transformer as a flux form and is transferred to outputduring the main switch off-time. Since the transformer needsto store energy during the main switch on-time, the coreshould be gapped. Since flyback converters need very fewcomponents, it is a very popular topology for low- andmedium-power applications such as battery chargers, adapt-ers, and DVD players.

Figure 1 shows a flyback converter operating in continuousconduction mode (CCM) and discontinuous conductionmode (DCM) with several parasitic components, such as pri-mary and secondary leakage inductors, an output capacitorof MOSFET, and a junction capacitor of a secondary diode.

Introduction

One of the most simple topologies is a flyback converter. It

idiDidiDdiode reverserecovery currentidtCjn:1VinLlk2LmimiD+VoVdsresonance betweenLlk1 and CossVin+nVoLlk1id+VdsCossidiDid(b) CCM operationtiDid(a) Configuration with parasitic componentsVdsresonance betweenLm and CosstVin+nVoVinresonance betweenLlk1 and Coss(c) DCM operationtFigure 1. Flyback Converter; (a) Configuration with Parasitic Components, (b) CCM Operation, (c) DCM Operation

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When the MOSFET turns off, the primary current (id)charges COSS of the MOSFET in a short time. When thevoltage across COSS (Vds) exceeds the input voltage plusreflected output voltage (Vin+nVo), the secondary diodeturns on, so that the voltage across the magnetizing inductor(Lm) is clamped to nVo. There is, therefore, a resonancebetween Llk1 and COSS with high-frequency and high-volt-age surge. This excessive voltage on the MOSFET maycause failure. In the case of the CCM operation, the second-ary diode remains turned on until the MOSFET is gated on.When the MOSFET turns on, a reverse recovery current ofthe secondary diode is added to the primary current, andthere is a large current surge on the primary current at theturn-on instance. Meanwhile, since the secondary currentruns dry before the end of one switching period in the case ofthe DCM operation, there is a resonance between Lm andCOSS of the MOSFET.

idipeakisntsiDSnubber design

The excessive voltage due to resonance between Llk1 andCOSS should be suppressed to an acceptable level by an addi-tional circuit to protect the main switch. The RCD snubbercircuit and key waveforms are shown in Figures 2 and 3. TheRCD snubber circuit absorbs the current in the leakageinductor by turning on the snubber diode (Dsn) when Vdsexceeds Vin+nVo. It is assumed that the snubber capacitanceis large enough that its voltage does not change during oneswitching period.

When the MOSFET turns off and Vds is charged to Vin+nVo,the primary current flows to Csn through the snubber diode(Dsn). The secondary diode turns on at the same time. There-fore, the voltage across Llk1 is Vsn-nVo. The slope of isn is asfollows:

VdsVsnVinnVoFigure 3. Key Waveforms of the Flyback Converter with

RCD Snubber in DCM Operation

where isn is the current that flows into the snubber circuit,Vsn is the voltage across the snubber capacitor Csn, n is theturns ratio of the main transformer, and Llk1 is the leakageinductance of the main transformer. The time ts is obtainedby:

⎛V−nVo⎞disn=−⎜sn⎟dt⎝Llk1⎠iDVinVsn+CsnDsnn:1+Vo(1)

ts=Llk1×ipeakVsn−nVo(2)

where ipeak is the peak current of the primary current. The snubber capacitor voltage (Vsn) should be determined atthe minimum input voltage and full-load condition. Once Vsnis determined, the power dissipated in the snubber circuit atthe minimum input voltage and full-load condition isobtained by:

RsnLlkisnid+VdsPsn=Vsnipeak⋅ts2fs=Vsn1Llkipeak2fs2Vsn−nVo(3)

where fs is the switching frequency of the flyback converter.

Vsn should be 2~2.5 times of nVo. Very small Vsn results in asevere loss in the snubber circuit, as shown in the aboveequation.

Figure 2. Flyback Converter with RCD Snubber

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On the other hand, since the power consumed in the snubberresistor (Rsn) is Vsn2/Rsn, the resistance is obtained by:

Example

An adapter using FSDM311 has following specifications:85Vac to 265Vac input voltage range, 10W output power, 5Voutput voltage, and 67kHz switching frequency. When theRCD snubber uses a 1nF snubber capacitor and 480kΩ snub-ber resistor, Figure 4 shows several waveforms with 265Vacat the instance of the AC switch turn-on.

Rsn=Vsn2Vsn1Llk1ipeak2fs2Vsn−nVo(4)

The snubber resistor with the proper rated power should be

chosen based on the power loss. The maximum ripple of thesnubber capacitor voltage is obtained as follows:

ΔVsn=VsnCsnRsnfs(5)

In general, 5~10% ripple is reasonable. Therefore, the snub-ber capacitance is calculated using the above equation. When the converter is designed to operate in CCM, the peakdrain current, together with the snubber capacitor voltage,decreases as the input voltage increases. The snubber capaci-tor voltage under maximum input voltage and full-load con-dition is obtained as follows:

Vsn2=nVo+(nVo)2+2RsnLlk1fs(Ipeak2)22(6)

Figure 4. Start-up Waveforms with 1nF Snubber Capacitor

and 480kΩ Snubber Resistor

where fs is the switching frequency of the flyback converter,Llk1 is the primary-side leakage inductance, n is the turnsratio of the transformer, Rsn is the snubber resistance, andIpeak2 is the primary peak current at the maximum input volt-age and full-load condition. When the converter operates inCCM at the maximum input voltage and full-load condition,the Ipeak2 is obtained as follows:

Ipeak2=Pin(VDCmax+nVo)VDCmax×nVo+VDCmax×nVo2Lmfs(VDCmaxIn Figures 4-7, Channel 1 through 4 stand for the drain volt-age (Vds, 200V/div), the supply voltage (VCC, 5V/div), thefeedback voltage (Vfb, 1V/div), and the drain current (Id,0.2A/div), respectively. The maximum voltage stress on theinternal SenseFET is around 675V, as shown in Figure 4.The voltage rating of FSDM311 is 650V, according to thedatasheet. There are two reasons for the excess of the voltageratings: the wrong transformer design and/or the wrongsnubber design. Figure 5 shows the reason.

+nVo)(7)

When the converter operates in DCM at the maximum inputvoltage and full-load condition, the Ipeak2 is obtained by:

574V451VIpeak2=2PinfsLm(8)

where Pin is the input power, Lm is the magnetizing induc-tance of the transformer, and VDCmax is the rectified maxi-mum input voltage in DC value.

Verify that the maximum value of Vds is below 90% and80% of the rated voltage of the MOSFET (BVdss), at thetransient period and steady-state period, respectively. Thevoltage rating of the snubber diode should be higher thanBVdss. Usually an ultra-fast diode with 1A current rating isused for the snubber circuit.

Figure 5. Steady-State Waveforms with 1nF Snubber

Capacitor and 480kΩ Snubber Resistor

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For the reliability, the maximum voltage stress at the steadystate should be equal to 80% of the rated voltage (650V * 0.8= 520V). Figure 5 shows the voltage stress on the internalSenseFET is above 570V with Vin = 265Vac at steady state.However, the fact that Vin+nVo is around 450V (= 375V +15 * 5V) implies the turns ratio of the transformer is 15,which is a reasonable value. Therefore, the snubber circuitshould be redesigned.

Let Vsn be twice that of nVo, 150V, and Llk1 and ipeak is 150µH and 400mA by measuring, respectively. Obtain thesnubber resistance as follows:

Vsn2Vsn1Llk1ipeak2fs2Vsn−nVo15021150×150μ×0.42××67k2150−75(9)

Rsn===14kFigure 7. Steady-State Waveforms with 10nF Snubber

Capacitor and 14kΩ Snubber Resistor

The power emission from Rsn is calculated as follows:

The voltage stresses on the internal SenseFET are 593V and524V at the startup and steady state, respectively. These arearound 91.2% and 80.6% of the rated voltage of FSDM311,respectively.

(10)

Vsn21502P===1.6WRsn14kLet the maximum ripple of the snubber capacitor voltage be

10% and the snubber capacitance is obtained as follows:

Csn=Vsn150==10nFΔVsnRsnfs15×14k×67k(11)

The results with 14kΩ (3W) and 10nF are shown in Figures6 and 7.

Figure 6. Start-up Waveforms with 10nF Snubber

Capacitor and 14kΩ Snubber Resistor

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by Gwan-Bon Koo/ Ph. D

FPS Application Group / Fairchild SemiconductorPhone +82-32-680-1327Fax +82-32-680-1317

E-mail koogb@fairchildsemi.co.kr

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